In order to increase storage density (memory capacity), a stacked semiconductor memory device in which memory cells are three-dimensionally arranged has been proposed. In such a stacked semiconductor memory device, gate electrode layers and insulation layers are alternately stacked on a semiconductor substrate. A semiconductor column penetrates the stacked body formed by the gate electrode and insulation layers. Memory cells are formed at the intersection of the gate electrode layers and the semiconductor column.
In a stacked semiconductor memory device, to further increase the storage density, it is conceivable to increase the number of stacked layers. However, since the length of the semiconductor column penetrating the stacked body must be increased, resistance of the semiconductor column will be increased. For that reason, there is a concern that problems will occur in memory operations.